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Appendix A: Hardware Reference Manual
For the case of the 10 kRPM operating point and the 24 minus 1 toothed-wheel, these 2000 instructions
must execute in 25 μ s or the risk of severe system latencies can cause the application to lose
synchronization of the rotating engine, resulting in loss of control. If an instruction is processed by the
core of the MCU on every bus clock cycle (RISC architecture), this equates to 8MHz performance. The
selection of the MC9S12P128 MCU exceeds this demand by providing a maximum processing speed of
32 MHz, based on its CISC architecture and an average of 3 cycles per instruction.
In addition to processing power, key hardware peripherals are required for engine control. These include:
input capture, output compare, PWM, A/D converter, communication port, and general purpose I/O. Input
capture is specifically used to process pulses from the toothed-wheel. Output compare is used to
generate fuel and spark events. Specifically, input capture and output compare functions must use the
same timer and a time base that allows a dynamic range of operation for an engine control application.
This means that at high RPM, the timer counter must be able to distinguish events and at low RPM there
must be enough counts to not overflow. PWM generation is essential for power management of loads.
This is a key concept for a small engine as electrical efficiency provides dramatic improvements in
operating performance. Sensor measurements are obtained by the A/D converter. Communication
outside the module is required for diagnostics and possible control or data output to other modules in the
system.
The MC9S12P128 meets these performance demands with a multi-channel 16-bit timer, PWM generator,
multi-channel 12 bit A/D converter, CAN and SCI ports, and large number of I/O. These features are
complemented by internal FLASH memory and the single wire BDM debugging/programming port that
aid in the development and deployment of software. Small package options from 48 to 80 pins, memory
sizes from 32 k to 128 k, and strong compatibility to the S12X product family add flexibility for
implementing a custom design.
10.4.1.3
Implementation Recommendations
Designing a system with a microcontroller takes experience. MCU manufacturers have specific
guidelines and recommendations that should be used as a starting point towards a successful design.
This primarily concern power supply bypassing and the MCU hardware configuration pins. Guidelines
provided in the datasheet for the MC9S12P128 in the 64 pin package have been demonstrated in this
design. Additionally, considerations for a 2 layer printed circuit board have been implemented that reflect
the high frequency operation large load switching in the system. This is reflected in the routed power
traces and comprehensive ground return paths for each signal.
The cost sensitivity of a small engine controller is reflected by the design decision to use a resonator and
not a crystal for the oscillator. Resonators offer significant cost reduction when compared to a crystal, but
at the sacrifice of precision. The resonator selected is relatively high tolerance and satisfies typical OEM
criteria for the generation of CAN communication bit timing for medium to high speed data rates. With the
MC9S12P128 MCU, further cost reduction can be explored by the making use of the internal reference
clock. This would eliminate the use of an external oscillator but would significantly reduce the timing
performance of the system. Additional cost reductions to the MCU circuit would include the use of the 48
pin QFN package.
Consideration for the S12XS product family was addressed in the design. This results in a low number of
additional components that can be placed onto the PCB when using the S12XS products in the 64 pin
package. Using this MCU will allow increased performance and increased memory size if the application
demands it. Significantly higher performance and memory size can be achieved through implementing
an S12XE family processor. Minimal hardware changes would be required to move the design to the
S12XE, which provides up to 50 MHz operation and adds the XGATE co-processor to off load the main
processor.
Small Engine Reference Design User Manual , Rev. 3.0
Freescale Semiconductor
45
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